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Computed

Laguna S 2.1 on an Apple M3 Ultra (512GB)

Yes — the unquantized weights fit with room for 1.0M tokens of context.

Verdict

Fits at FP16

384.0 GiB usable of 512 GB

Weights (Q4_K_M)

66.8 GiB

219.0 GiB at FP16 · 117.6B params · 6 of 6 quant rows are measured files

KV cache

192.0 KiB per token at FP16

48 layers × 8 KV heads × 128 dimensions

Speed ceiling

55 tok/s

819 GB/s ÷ bytes read per token

Every quant, against this card

Weight bytes are the size of the real published file wherever one exists — 6 of these6 rows are measured from bartowski/Laguna-S-2.1-GGUF, the rest computed from the parameter count. Max context is what the KV cache can grow to in whatever memory the weights leave behind, capped at the 1.0M tokens this model was trained to address.

384.0 GiB usableFP16 / BF16 · 219.0 GiBQ8_0 · 116.4 GiBQ6_K · 94.7 GiBQ5_K_M · 78.2 GiBQ4_K_M · 66.8 GiBQ3_K_M · 50.3 GiB
Bars are the weight bytes at each precision; the dashed line is the usable memory of an Apple M3 Ultra (512GB). Drawn from the computed byte counts, not sketched.
PrecisionBits/weightWeightsSourceFitsMax contextCeiling
FP16 / BF1616.00219.0 GiBmeasured fileyes1,048,576 (model cap)55 tok/s
Q8_08.51116.4 GiBmeasured fileyes1,048,576 (model cap)100 tok/s
Q6_K6.9294.7 GiBmeasured fileyes1,048,576 (model cap)122 tok/s
Q5_K_M5.7278.2 GiBmeasured fileyes1,048,576 (model cap)145 tok/s
Q4_K_M4.8866.8 GiBmeasured fileyes1,048,576 (model cap)168 tok/s
Q3_K_M3.6850.3 GiBmeasured fileyes1,048,576 (model cap)216 tok/s

What the context actually costs

The KV cache is 2 · layers · kv_heads · head_dim bytes per token per element — 2 · 48 · 8 · 128 · 2 B = 192.0 KiB. It depends on the key/value head count, not the attention-head count and not the parameter count. This model shares 8 KV heads across 48 query heads, which divides the cache by 6 against multi-head attention.

Sliding-window attention. 36 of this model's 48 layers attend to a 512-token window and stop growing there; only the remaining 12 keep scaling with context. That is why the cache figures below flatten out — and why a calculator that ignores the layer pattern over-states this model's long-context footprint several times over.

ContextKV cache (FP16)KV cache (8-bit)Plus Q4_K_M weights
4,096264 MiB132 MiB67.1 GiB
8,192456 MiB228 MiB67.3 GiB
32,7681.6 GiB804 MiB68.4 GiB
131,0726.1 GiB3.0 GiB72.9 GiB

The speed ceiling, and where it comes from

Generating one token reads every active weight from memory once. At FP16 / BF16 that is 13.5 GiB — only 6% of the checkpoint, because this is a mixture of experts and each token is routed to 10 of 256, plus a pass over the KV cache. An Apple M3 Ultra (512GB) moves 819 GB/s, so the arithmetic ceiling is 55 tok/s. Treat it as a bound, not an estimate: attention overhead, kernel launches and imperfect memory access keep real runtimes at roughly 60–80% of it, and nothing pushes past it.

Where these numbers come from

The model

Parameters
117,561,977,600
Layers
48
Attention / KV heads
48 / 8
Head dimension
128
Trained context
1,048,576
Checkpoint as published
219.0 GiB

Read from poolside/Laguna-S-2.1. The parameter count is the Hub's own total over the tensor shapes, not a figure taken from the model's name.

The accelerator

Memory
512 GB LPDDR5 unified
Bandwidth
819 GB/s
Assumed usable
75% → 384.0 GiB

Capacity and bandwidth from the vendor's specification. The usable fraction is an assumption, not a spec: unified memory is shared with the OS and the display, and the GPU working-set cap is raisable on Apple silicon with `sudo sysctl iogpu.wired_limit_mb`.

Questions this pairing answers

How much VRAM does Laguna S 2.1 need?

219.0 GiB for the weights at FP16 — 117.6B parameters at two bytes each — and 66.8 GiB at Q4_K_M. The KV cache is on top of that and is not a fixed number: this model spends 192.0 KiB per token of context on its full-attention layers, so 8,192 tokens costs a further 456 MiB. An Apple M3 Ultra (512GB) makes 384.0 GiB of its 512 GB available on the assumption below.

Can an Apple M3 Ultra (512GB) run Laguna S 2.1?

Yes — the unquantized weights fit with room for 1.0M tokens of context. That is the weights and the KV cache together, against 384.0 GiB of usable memory.

How fast will Laguna S 2.1 run on an Apple M3 Ultra (512GB)?

No faster than 55 tokens/second at FP16 / BF16, and in practice below it. Decoding is memory-bound: every token reads the 6% of weights this MoE routes to 13.5 GiB of weights plus the cache, and this card moves 819 GB/s. That division is the ceiling — no kernel, runtime or driver beats it, and a real runtime typically reaches 60–80% of it.

Why does the context length change how much memory Laguna S 2.1 needs?

Because the KV cache holds one key and one value vector per token, per layer, for the whole conversation, and it is allocated separately from the weights. This model has 48 layers and 8 key/value heads of 128 dimensions, shared across 48 query heads — grouped-query attention, which divides the cache by 6. That works out at 192.0 KiB per token, except that 36 of the 48 layers use a 512-token sliding window and stop growing there. Parameter count tells you nothing about this number.

The same model on a different card

A different model on the same card

All 62 models on Apple M3 Ultra (512GB) →

Method and limits. Weight bytes are the byte size of the real published file wherever one exists, and the model's exact parameter count times the published llama.cpp bits-per-weight where it does not. That distinction is on every row above and it matters at both ends: a sub-1B model's Q4_K_M file runs a third larger than the nominal figure because k-quants keep its embedding tables at higher precision, and an already-4-bit release cannot be quantized upward at all. The KV cache is 2 · layers · kv_heads · head_dim · bytes per token, summed over layers with each sliding-window layer capped at its window. The speed figure is a roofline bound, not a benchmark: bandwidth divided by bytes read per token, which no runtime exceeds and every runtime falls short of. The usable fraction of card memory is an assumption: 75% here, which is what this lane assumes for unified memory, where the OS and window server share the same pool — the other class assumes 92%, so it is not one number applied to every device. That is the only assumed input on this page; every other figure is computed from the model config and the card's published specification. Nothing on this page is written by a language model. Architecture from the model's published config, fetched 2026-08-07.