Computed

Hy3 on an H100 80GB (SXM5)

No. Even Q3_K_M needs 128.1 GiB against 73.6 GiB usable.

Change the numbers →Hy3 on every card H100 80GB (SXM5) across every model

Verdict

Does not fit

73.6 GiB usable of 80 GB

Weights (Q4_K_M)

169.6 GiB

556.5 GiB at FP16 · 298.8B params · 6 of 6 quant rows are measured files

KV cache

320.0 KiB per token at FP16

80 layers × 8 KV heads × 128 dimensions

Speed ceiling

13.6 tok/s

offloaded — nothing fits in device memory

Every quant, against this card

Weight bytes are the size of the real published file wherever one exists — 6 of these6 rows are measured from bartowski/Hy3-GGUF, the rest computed from the parameter count. Max context is what the KV cache can grow to in whatever memory the weights leave behind, capped at the 256k tokens this model was trained to address.

Bars are the weight bytes at each precision; the dashed line is the usable memory of an H100 80GB (SXM5). Drawn from the computed byte counts, not sketched.

Precision	Bits/weight	Weights	Source	Fits	Max context	Ceiling
FP16 / BF16	16.00	556.5 GiB	measured file	−482.9 GiB	—	2.5 tok/s offloaded
Q8_0	8.51	295.8 GiB	measured file	−222.2 GiB	—	4.9 tok/s offloaded
Q6_K	6.89	239.6 GiB	measured file	−166.0 GiB	—	6.3 tok/s offloaded
Q5_K_M	5.70	198.2 GiB	measured file	−124.6 GiB	—	7.9 tok/s offloaded
Q4_K_M	4.88	169.6 GiB	measured file	−96.0 GiB	—	9.5 tok/s offloaded
Q3_K_M	3.68	128.1 GiB	measured file	−54.5 GiB	—	13.6 tok/s offloaded

What the context actually costs

The KV cache is 2 · layers · kv_heads · head_dim bytes per token per element — 2 · 80 · 8 · 128 · 2 B = 320.0 KiB. It depends on the key/value head count, not the attention-head count and not the parameter count. This model shares 8 KV heads across 64 query heads, which divides the cache by 8 against multi-head attention.

Context	KV cache (FP16)	KV cache (8-bit)	Plus Q4_K_M weights
4,096	1.3 GiB	640 MiB	170.9 GiB
8,192	2.5 GiB	1.3 GiB	172.1 GiB
32,768	10.0 GiB	5.0 GiB	179.6 GiB
131,072	40.0 GiB	20.0 GiB	209.6 GiB

What running it anyway would cost

Nothing here fits, so the weights would have to be split with part of the model in host RAM. At Q3_K_M that is 54.5 GiB on the host side, and assuming 90 GB/s of host memory bandwidth — a dual-channel DDR5 desktop — the ceiling falls to 13.6 tok/s, against 289.7 tok/s if the same weights were resident — 3350 GB/s over the 11.56 GB one token reads, which is the weights the model routes through plus one pass over the cache, against a 137.55 GB weight file. That host bandwidth is an assumption and it is the number to change first if your machine differs; the ratio is the part that generalises.

Where these numbers come from

The model

Parameters: 298,786,155,776
Layers: 80
Attention / KV heads: 64 / 8
Head dimension: 128
Trained context: 262,144
Checkpoint as published: 556.5 GiB

Read from tencent/Hy3. The parameter count is the Hub's own total over the tensor shapes, not a figure taken from the model's name.

The accelerator

Memory: 80 GB HBM3
Bandwidth: 3350 GB/s
Assumed usable: 92% → 73.6 GiB

Capacity and bandwidth from the vendor's specification. The usable fraction is an assumption, not a spec: a driver context, compute workspace and any attached display come out of the same pool before a weight is loaded.

Questions this pairing answers

How much VRAM does Hy3 need?

556.5 GiB for the weights at FP16 — 298.8B parameters at two bytes each — and 169.6 GiB at Q4_K_M. The KV cache is on top of that and is not a fixed number: this model spends 320.0 KiB per token of context, so 8,192 tokens costs a further 2.5 GiB. An H100 80GB (SXM5) makes 73.6 GiB of its 80 GB available on the assumption below.

Can an H100 80GB (SXM5) run Hy3?

No. Even Q3_K_M needs 128.1 GiB against 73.6 GiB usable. Holding the smallest quant here would need a card with about 140 GB. Splitting the model across the PCIe bus is possible and slow — see the offload figure on this page.

How fast will Hy3 run on an H100 80GB (SXM5)?

It cannot run in this card's memory alone, so the speed is set by whatever bus the offloaded part is read across, not by the 3350 GB/s of the card. At an assumed 90 GB/s of host memory bandwidth the ceiling is 13.6 tok/s at Q3_K_M, against 289.7 tok/s if it were resident — 3350 GB/s over the 11.56 GB one token reads at Q3_K_M, priced at the 8k reference context. That is the weights the model routes through plus one pass over the cache, against a 137.55 GB weight file.

Why does the context length change how much memory Hy3 needs?

Because the KV cache holds one key and one value vector per token, per layer, for the whole conversation, and it is allocated separately from the weights. This model has 80 layers and 8 key/value heads of 128 dimensions, shared across 64 query heads — grouped-query attention, which divides the cache by 8. That works out at 320.0 KiB per token. Parameter count tells you nothing about this number.

The same model on a different card

A different model on the same card

All 62 models on H100 80GB (SXM5) →

Method and limits. Weight bytes are the byte size of the real published file wherever one exists, and the model's exact parameter count times the published llama.cpp bits-per-weight where it does not. That distinction is on every row above and it matters at both ends: a sub-1B model's Q4_K_M file runs a third larger than the nominal figure because k-quants keep its embedding tables at higher precision, and an already-4-bit release cannot be quantized upward at all. The KV cache is 2 · layers · kv_heads · head_dim · bytes per token, summed over layers with each sliding-window layer capped at its window. The speed figure is a roofline bound, not a benchmark: bandwidth divided by bytes read per token, which no runtime exceeds and every runtime falls short of. The usable fraction of card memory is an assumption: 92% here, which is what this lane assumes for a dedicated card — the other class assumes 75%, so it is not one number applied to every device. Because nothing here fits, a second assumed input is in play — the 90 GB/s of host memory bandwidth the offload ceiling is priced at, stated above. Those two are the assumed inputs; every other figure is computed from the model config and the card's published specification. Nothing on this page is written by a language model. Architecture from the model's published config, fetched 2026-08-07.