Skip to main content
Computed

OLMo 2 13B Instruct on a Jetson Orin Nano Super (8GB)

No. Even Q3_K_M needs 6.3 GiB against 6.0 GiB usable.

Verdict

Does not fit

6.0 GiB usable of 8 GB

Weights (Q4_K_M)

7.8 GiB

25.5 GiB at FP16 · 13.7B params · 6 of 6 quant rows are measured files

KV cache

800.0 KiB per token at FP16

40 layers × 40 KV heads × 128 dimensions

Speed ceiling

9.6 tok/s

offloaded — nothing fits in device memory

Every quant, against this card

Weight bytes are the size of the real published file wherever one exists — 6 of these6 rows are measured from bartowski/OLMo-2-1124-13B-Instruct-GGUF, the rest computed from the parameter count. Max context is what the KV cache can grow to in whatever memory the weights leave behind, capped at the 4k tokens this model was trained to address.

6.0 GiB usableFP16 / BF16 · 25.5 GiBQ8_0 · 13.6 GiBQ6_K · 10.5 GiBQ5_K_M · 9.1 GiBQ4_K_M · 7.8 GiBQ3_K_M · 6.3 GiB
Bars are the weight bytes at each precision; the dashed line is the usable memory of a Jetson Orin Nano Super (8GB). Drawn from the computed byte counts, not sketched.
PrecisionBits/weightWeightsSourceFitsMax contextCeiling
FP16 / BF1616.0025.5 GiBmeasured file−19.5 GiB3.0 tok/s offloaded
Q8_08.5013.6 GiBmeasured file−7.6 GiB5.2 tok/s offloaded
Q6_K6.5710.5 GiBmeasured file−4.5 GiB6.5 tok/s offloaded
Q5_K_M5.699.1 GiBmeasured file−3.1 GiB7.3 tok/s offloaded
Q4_K_M4.877.8 GiBmeasured file−1.8 GiB8.2 tok/s offloaded
Q3_K_M3.956.3 GiBmeasured file−322 MiB9.6 tok/s offloaded

What the context actually costs

The KV cache is 2 · layers · kv_heads · head_dim bytes per token per element — 2 · 40 · 40 · 128 · 2 B = 800.0 KiB. It depends on the key/value head count, not the attention-head count and not the parameter count.

ContextKV cache (FP16)KV cache (8-bit)Plus Q4_K_M weights
4,0963.1 GiB1.6 GiB10.9 GiB

What running it anyway would cost

Nothing here fits, so the weights would have to be split with part of the model in host RAM. At Q3_K_M that is 322 MiB on the host side, and assuming 90 GB/s of host memory bandwidth — a dual-channel DDR5 desktop — the ceiling falls to 9.6 tok/s, against 10.1 tok/s if the same weights were resident — 102 GB/s over the 10.14 GB one token reads, which is the weights the model routes through plus one pass over the cache, against a 6.78 GB weight file. That host bandwidth is an assumption and it is the number to change first if your machine differs; the ratio is the part that generalises.

Where these numbers come from

The model

Parameters
13,716,198,400
Layers
40
Attention / KV heads
40 / 40
Head dimension
128
Trained context
4,096
Checkpoint as published
25.5 GiB

Read from allenai/OLMo-2-1124-13B-Instruct. The parameter count is the Hub's own total over the tensor shapes, not a figure taken from the model's name.

The accelerator

Memory
8 GB LPDDR5 unified
Bandwidth
102 GB/s
Assumed usable
75% → 6.0 GiB

Capacity and bandwidth from the vendor's specification. The usable fraction is an assumption, not a spec: unified memory is shared with the OS and the display, and the GPU working-set cap is raisable on Apple silicon with `sudo sysctl iogpu.wired_limit_mb`.

Questions this pairing answers

How much VRAM does OLMo 2 13B Instruct need?

25.5 GiB for the weights at FP16 — 13.7B parameters at two bytes each — and 7.8 GiB at Q4_K_M. The KV cache is on top of that and is not a fixed number: this model spends 800.0 KiB per token of context, so 8,192 tokens costs a further 6.3 GiB. A Jetson Orin Nano Super (8GB) makes 6.0 GiB of its 8 GB available on the assumption below.

Can a Jetson Orin Nano Super (8GB) run OLMo 2 13B Instruct?

No. Even Q3_K_M needs 6.3 GiB against 6.0 GiB usable. Holding the smallest quant here would need a card with about 9 GB. Splitting the model across the PCIe bus is possible and slow — see the offload figure on this page.

How fast will OLMo 2 13B Instruct run on a Jetson Orin Nano Super (8GB)?

It cannot run in this card's memory alone, so the speed is set by whatever bus the offloaded part is read across, not by the 102 GB/s of the card. At an assumed 90 GB/s of host memory bandwidth the ceiling is 9.6 tok/s at Q3_K_M, against 10.1 tok/s if it were resident — 102 GB/s over the 10.14 GB one token reads at Q3_K_M, priced at the 4k reference context. That is the weights the model routes through plus one pass over the cache, against a 6.78 GB weight file.

Why does the context length change how much memory OLMo 2 13B Instruct needs?

Because the KV cache holds one key and one value vector per token, per layer, for the whole conversation, and it is allocated separately from the weights. This model has 40 layers and 40 key/value heads of 128 dimensions. That works out at 800.0 KiB per token. Parameter count tells you nothing about this number.

The same model on a different card

A different model on the same card

All 62 models on Jetson Orin Nano Super (8GB) →

Method and limits. Weight bytes are the byte size of the real published file wherever one exists, and the model's exact parameter count times the published llama.cpp bits-per-weight where it does not. That distinction is on every row above and it matters at both ends: a sub-1B model's Q4_K_M file runs a third larger than the nominal figure because k-quants keep its embedding tables at higher precision, and an already-4-bit release cannot be quantized upward at all. The KV cache is 2 · layers · kv_heads · head_dim · bytes per token, summed over layers with each sliding-window layer capped at its window. The speed figure is a roofline bound, not a benchmark: bandwidth divided by bytes read per token, which no runtime exceeds and every runtime falls short of. The usable fraction of card memory is an assumption: 75% here, which is what this lane assumes for unified memory, where the OS and window server share the same pool — the other class assumes 92%, so it is not one number applied to every device. Because nothing here fits, a second assumed input is in play — the 90 GB/s of host memory bandwidth the offload ceiling is priced at, stated above. Those two are the assumed inputs; every other figure is computed from the model config and the card's published specification. Nothing on this page is written by a language model. Architecture from the model's published config, fetched 2026-08-07.