Field note / Local LLMs
Qwen3.6-35B decodes ~11.2 B active per pass
Bandwidth-bound decode math on RTX 5090D measurements backs out that only ~32% of Qwen3.6-35B's nominal weights are active per forward pass.

Joshua HriskoPrincipal Engineer
7 min readSan Francisco, CA

Composed from the signals scanned on 2026-08-07.
The studio’s RTX 5090D measurement — 1.34 TB/s stated bandwidth, ~25% below the 5090 in BW-bound decode — lets us back out that Unsloth’s reported ~320 tok/s for Qwen3.6-35B at NVFP4 on RTX 5090 implies an effective active-weight footprint of ~11.2 B parameters per forward pass. About one-third of nominal. That ratio fingerprints MoE routing where most experts stay dark during decode. The 1.4–2.2× MTP multiplier Unsloth claims for Qwen3.6 stacks on top of that already-lightened footprint, keeping the product inside the bandwidth ceiling — the same stacking breaks for a dense 35B model.
What Unsloth reports
Unsloth’s headline is “train and RL 500+ models up to 2× faster with 70% less VRAM; MoE up to 12× faster.” Every figure carries implicit conditions; few are disclosed uniformly across the README. The table below assembles what is stated alongside each number:
| Claim | Figure | Condition attached | Scope |
|---|---|---|---|
| General training/RL speedup | up to 2× | No baseline stated; LoRA/QLoRA implied by context | 500+ models |
| MoE training speedup | up to 12× | DeepSeek, GLM, Qwen, gpt-oss named; no hardware given | MoE family |
| MoE VRAM reduction | 35% less | Co-stated with 12× speed claim | MoE family |
| RL VRAM reduction | 80% less | GRPO, FP8, vision RL named; 7× context also claimed in same sentence | RL paths only |
| Long-context training speed | 3× faster | Packing technique; 500K+ context | Long-context only |
| Long-context VRAM reduction | 30% less | Same packing context as 3× speed | Long-context only |
| 20B at >500K context | fits 80 GB GPU | Single GPU; precision not stated | Specific size/context |
| Qwen3.6 MTP inference | 1.4–2.2× | MTP heads; NVFP4 for “supported GPUs” | Qwen3.6 only |
| Embedding fine-tuning | ~1.8–3.3× | Approximate marker (”~”) given explicitly | Embedding models |
| DiffusionGemma inference | 1.8× | Studio UI only, not standalone library path | Studio path |
| gpt-oss 20B fine-tuning | 2× / 70% less | Colab notebook; conditions inherit from Colab environment | Dense MoE fine-tuning |
| Gemma 4 E2B fine-tuning | 1.5× / 50% less | Colab notebook | Vision fine-tuning |
Unsloth reports a dual-license: core package Apache 2.0, Studio AGPL-3.0. That boundary matters for any product that embeds the inference server or the UI.
Analysis
Active-parameter footprint from measured decode rate. For bandwidth-bound autoregressive decode, throughput is governed by:
where is peak memory bandwidth, is the active parameter count, and is bytes per parameter. Rearranging to isolate :
From the studio’s RTX 5090 decode field note: the 5090D delivers 1.34 TB/s stated bandwidth and sits ~25% below the 5090 in BW-bound decode. Treating that performance gap as bandwidth-proportional gives an implied 5090 ceiling:
The same field note records imp at ~320 tok/s on Qwen3.6-35B with a native NVFP4 checkpoint on RTX 5090. NVFP4 is 4-bit, so bytes per parameter. Substituting:
The predicted pass rate at this footprint is tok/s — within rounding of the measured 320 tok/s. The bandwidth-bound model is tight here. The ratio is consistent with sparse MoE dispatch; Unsloth groups Qwen among the MoE targets for its 12× training claim, placing it in the same architectural class. The Q8_0/Q6K → NVFP4 caching route yields 267–272 tok/s on the same hardware, running 15–17% below the native NVFP4 checkpoint — the throughput cost of on-the-fly format conversion. Use the pre-quantized checkpoint where the GPU supports it.
MTP multiplier and the bandwidth ceiling. Unsloth reports 1.4–2.2× inference improvement for Qwen3.6 with MTP. Multi-token prediction via speculative draft heads does not reduce bandwidth consumed per main-model forward pass — it raises effective token throughput by emitting accepted tokens per pass:
Unsloth’s 1.4–2.2× claim therefore implies accepted tokens per main-model pass on their test conditions. Applied to the 320 tok/s baseline, effective output spans to tok/s. Those multiples stay inside the bandwidth envelope because the pass itself still costs only GB of weight reads. A dense 35B model at NVFP4 would load GB per pass, with a theoretical ceiling of tok/s before MTP is applied — the whole construction depends on sparse active weight load.
The 500K context on 80 GB. Unsloth states that training a 20B model at >500K context fits a single 80 GB GPU with its packing technique, claiming 30% less VRAM versus baseline. Working backwards: if 80 GB is the post-Unsloth budget and the saving is 30%, the naive baseline is GB — which normally requires two A100/H100 80 GB cards without packing. For studios running single-GPU training nodes, collapsing that to one card is the operationally relevant outcome, whatever the baseline implementation.
Chart: figures as unslothai/unsloth reports them, drawn from the quantities this post cites. Bars are proportional to the reported values; the studio has not re-measured them.
What the numbers do not settle
Every Unsloth speedup figure omits comparison baseline, hardware, batch size, sequence length, and whether full fine-tuning or QLoRA/LoRA was used. The 2× general claim and the 12× MoE claim likely measure different techniques against different stock implementations. Neither is reproducible from the README alone. Unsloth’s own notebook table — Gemma 4 E2B, Qwen3.5-4B, gpt-oss 20B — comes closest to stated conditions, but Colab GPU provisioning variance makes exact replication unreliable. The studio has not run any of these training benchmarks.
What this means for itria
Itria ships llama.cpp with Metal acceleration; Unsloth’s training stack does not touch the binary. The relevant overlap is inference-side: how bandwidth governs throughput across hardware tiers. The studio’s edge-device field note shows a 3B Q4 model consuming GB/s on M4 Max against a 400 GB/s rated bus. The bandwidth-bound model holds from Raspberry Pi to server GPU, and the 15–17% gap between a pre-quantized NVFP4 checkpoint and an on-the-fly conversion path is proportionally significant at every tier.
The imp backend’s 42–48% advantage over llama.cpp on RTX 5090 is a hardware-specific kernel optimization; it does not transfer to Metal. On Apple Silicon, decode rate tracks the unified memory bus, not the backend. The Qwen3.6 MTP mechanism is implementable via llama.cpp’s existing speculative decode path, and the implied –2.2 from Unsloth’s figure is a reasonable prior for deciding whether that integration overhead is worth it for a given on-device model size.
GLM-5.2 (744B parameters, 1M-context window, as reported by Unsloth) is GGUF-inference-only at any quantization aggressive enough to fit consumer hardware; at the bandwidths available to itria’s target devices it is not viable. The AGPL-3.0 clause on Unsloth Studio also rules out embedding its inference server in a shipped app without a commercial license.
Method: this note was drafted by us.anthropic.claude-sonnet-4-6 from two sources — the published README of unslothai/unsloth and this studio’s own published measurements, linked above. Before publication an automated gate re-checked every extracted claim against the source document (15 claim(s) and 25 quantity(ies) verified) and every claim-shaped number in the draft against that evidence (16 derived from it, 10 row(s) supplied from our own tables). The studio has not re-run unslothai/unsloth’s benchmarks; figures attributed to it are its own.
FAQ
Does the 12× MoE training speedup apply to full fine-tuning or only LoRA?
Unsloth's README does not separate these cases. The 12× claim appears in the context of general training improvements, with DeepSeek, GLM, Qwen, and gpt-oss named as targets — all used in practice as fine-tuning bases, not pretraining runs. Applying the figure to pretraining MoE from scratch is not supported by the available documentation.
Can Qwen3.6 MTP be used with llama.cpp's speculative decode path?
MTP uses auxiliary prediction heads trained into the main checkpoint, not a separate smaller draft model. Whether llama.cpp's speculative decode path can consume those heads turns on GGUF export and sampler logic alignment. The accept-rate range implied by Unsloth's claim (k = 1.4–2.2) is a useful calibration point, but the mechanism may require integration work beyond what llama.cpp provides out of the box.
Is the 80% VRAM reduction for RL additive with the 70% reduction for general training?
No — these are claims for distinct training configurations with different memory profiles: RL with GRPO holds a reference model copy and reward buffers that SFT does not. Unsloth does not claim these compound. Treating them as additive would overstate the available reduction for a combined SFT + RL workflow.
What does the AGPL-3.0 on Unsloth Studio mean for a shipped product?
Unsloth reports that the core training library is Apache 2.0 but the Studio UI is AGPL-3.0. The library API is Apache-compatible for commercial use. Wrapping or embedding the Studio server — including its /v1/chat/completions endpoint — in a shipped product requires either full AGPL-3.0 compliance (source disclosure for the combined work) or a separate commercial license from Unsloth.
Recommended Studio & Hardware Gear
Affiliate links support independent R&DTested studio equipment and reference hardware utilized for this build. Product images & pricing sourced from Amazon Creators API / SparkFun Electronics.
$134.99SBCVilros Raspberry Pi 4 4GB Basic Starter Kit with Fan-Cooled Heavy-Duty Aluminum Alloy Case
4GB Pi 4 kit with case/fan — the compute base for BLExAR's LiDAR, thermal, GPS, and audio-array builds.
$6,999.00ComputerApple MacBook Pro M5 Max, 128GB Unified Memory, 2TB SSD
The portable 128 GB machine. Same resident-model argument as the Mac Studio, in a laptop you can profile on.
$12,855.95GPUPNY NVIDIA RTX PRO 6000 Blackwell Workstation Edition — 96GB GDDR7
96 GB of GDDR7 on one card. The single-GPU route to a resident 70B: the weights fit roughly three times over at Q4_K_M, and the memory bandwidth is what actually sets decode speed.
$1,699.00ComputerApple MacBook Air 13-inch M5, 32GB Unified Memory, 512GB SSD, Midnight
32 GB of unified memory in the lightest Apple silicon body — enough to keep a quantized mid-size model resident instead of streaming it off SSD.
$329.00WearableApple Watch Series 11, GPS 46mm, Jet Black Aluminum
The watchOS target itself. Any on-device inference claim for the Watch is bounded by its CPU-accessible bandwidth, which Apple does not publish.
Prices shown were retrieved from the Amazon Product Advertising API on 19 July 2026 and are indicative only — the price and availability on Amazon at the time of purchase apply.
Prices shown were checked against the Amazon product listing on 9 August 2026 and are indicative only — the price and availability on Amazon at the time of purchase apply.